Patent · US Active

Handling a failed processor of multiprocessor information handling system

US8892944B2 · kind B2 · utility

1Cited by
3References
5Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 3, 2012
Grant dateNov 18, 2014
Priority date
Expiry dateAug 24, 2032

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F11/2043
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method for handling a failed processor of a multiprocessor system, the multiprocessor system comprising at least two processors interconnected by processor interconnects for transactions between processors, the processors comprising a first processor and a second processor, the first processor being set as a default boot processor in response to a boot-up operation of the multiprocessor system. The method comprises: detecting and receiving, via a baseboard management module, health information of the at least two processors; providing a multiplexer operative to switch between the at least two processors, the multiplexer being coupled to the baseboard management module and respectively to the at least two processors; and, in response to the health information indicating the first processor has failed, setting, via a processor ID controller, the second processor as the default boot processor and enabling, via the baseboard management module, the multiplexer to switch to the second processor.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.