Automatic asynchronous offload to many-core coprocessors
US8893103B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 12, 2013 |
| Grant date | Nov 18, 2014 |
| Priority date | — |
| Expiry date | Jul 30, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2209/509
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and systems for asynchronous offload to many-core coprocessors include splitting a loop in an input source code into a sampling sub-part, a many integrated core (MIC) sub-part, and a central processing unit (CPU) sub-part; executing the sampling sub-part with a processor to determine loop characteristics including memory- and processor-operations executed by the loop; identifying optimal split boundaries based on the loop characteristics such that the MIC sub-part will complete in a same amount of time when executed on a MIC processor as the CPU sub-part will take when executed on a CPU; and modifying the input source code to split the loop at the identified boundaries, such that the MIC sub-part is executed on a MIC processor and the CPU sub-part is concurrently executed on a CPU.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.