Tipless transistors, short-tip transistors, and methods and circuits therefor
US8895327B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 8, 2012 |
| Grant date | Nov 25, 2014 |
| Priority date | — |
| Expiry date | Dec 8, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0167
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated circuit can include a plurality of first transistors formed in a substrate and having gate lengths of less than one micron; and at least one tipless transistor formed in the substrate and having a source-drain path coupled between a circuit node and a first power supply voltage; wherein at least one tipless transistor has source and drain vertical doping profiles without extension regions that extend in a lateral direction under a gate electrode. In addition or alternatively, an integrated circuit can include minimum feature size transistors having gate lengths of less than one micron; a signal driving circuit comprising a first transistor of a first conductivity type having a source-drain path coupled between a first power supply node and an output node, and a second transistor of a second conductivity type having a source-drain path coupled between a second power supply node and the output node, and a gate coupled to a gate of the first transistor, wherein at least one of the first or second transistor is a tipless transistor having source and drain vertical doping profiles without extension regions that extend in a lateral direction under a gate electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.