Method of forming semiconductor structure
US8895386B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 1, 2012 |
| Grant date | Nov 25, 2014 |
| Priority date | — |
| Expiry date | Nov 21, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/811
Abstract
A method of forming a semiconductor structure is provided. A substrate having a cell area and a periphery area is provided. An oxide material layer and a first conductive material layer are sequentially formed on the substrate in the cell and periphery areas. A patterning step is performed to form first and second stacked structures on the substrate respectively in the cell and periphery areas. First and second spacers are formed respectively on sidewalls of the first and second stacked structures. At least two first doped regions are formed in the substrate beside the first stacked structure, and two second doped regions are formed in the substrate beside the second stacked structure. A dielectric layer and a second conductive layer are formed at least on the first stacked structure. The first stacked structure, the dielectric layer, and the second conductive layer in the cell area constitute a charge storage structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.