Integrated circuit and method of forming sealed trench junction termination
US8895399B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 7, 2012 |
| Grant date | Nov 25, 2014 |
| Priority date | — |
| Expiry date | Aug 7, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/104
Abstract
An integrated circuit having a substrate with a first conductivity type of semiconductor material. A buried layer is formed in the substrate. The buried layer has a second conductivity type of semiconductor material. A first semiconductor layer is formed over the buried layer. The first semiconductor layer has the second conductivity type of semiconductor material. A trench is formed through the first semiconductor layer and buried layer and extends into the substrate. The trench is lined with an insulating layer and filled with an insulating material. A second semiconductor layer is formed in the first semiconductor layer. The second semiconductor layer has the first conductivity type of semiconductor material. A third semiconductor layer is formed in the second semiconductor layer. The third semiconductor layer has the second conductivity type of semiconductor material. The first, second, and third semiconductor layers form the collector, base, and emitter of a bipolar transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.