Reducing defects in electronic switching devices
US8896071B2 · kind B2 · utility
2Cited by
6References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 12, 2008 |
| Grant date | Nov 25, 2014 |
| Priority date | — |
| Expiry date | Nov 15, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K85/111
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A technique for isolating electrodes on different layers of a multilayer electronic device across an array containing more than 100000 devices on a plastic substrate. The technique comprises depositing a bilayer of a first dielectric layer (6) of a solution-processible polymer dielectric and a layer of parylene (9) to isolate layers of conductor or semiconductor on different levels of the device. The density of defects located in the active area of one of the multilayer electronic devices is typically more than 1 in 100000.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.