Micro-link high-bandwidth chip-to-chip bus
US8898365B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 22, 2012 |
| Grant date | Nov 25, 2014 |
| Priority date | — |
| Expiry date | Jun 6, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A chip package includes a micro-link between components disposed on a substrate. The micro-link may be an ultra-short multi-conductor transmission line with shared reference planes that results in a distribution of impedance values. Furthermore, the composite signal traces in the transmission line each can support communication of one symbol at a time by ensuring that multiple reflections reach a substantial fraction of a steady-state value within a symbol time. In this way, the micro-link may facilitate continued scaling of the communication bandwidth between the components with low latency to increase the performance of computer systems that include the chip package.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.