Redriven/retimed registered dual inline memory module
US8898368B2 · kind B2 · utility
4Cited by
6References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 7, 2008 |
| Grant date | Nov 25, 2014 |
| Priority date | — |
| Expiry date | Feb 6, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4072
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory module may include a plurality of dynamic random access memory (DRAM) chips, each of which may have one or more data input/output (D/Q) terminals. The memory module may include data redriving/retiming circuits connected to the D/Q terminals of the plurality of DRAM chips. The data redriving/retiming circuits may provide isolation between a system memory bus and the D/Q terminals of the DRAM chips.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.