Methods of manufacturing semiconductor devices
US8901009B2 · kind B2 · utility
2Cited by
1References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 19, 2013 |
| Grant date | Dec 2, 2014 |
| Priority date | — |
| Expiry date | Dec 19, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/884
Abstract
A memory device includes a lower interconnection in a semiconductor substrate, the lower interconnection being made of a material different from the semiconductor substrate, a selection element on the lower interconnection, and a memory element on the selection element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.