Hierarchical task mapping
US8904398B2 · kind B2 · utility
2Cited by
3References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 6, 2012 |
| Grant date | Dec 2, 2014 |
| Priority date | — |
| Expiry date | Oct 5, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/5066
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Mapping tasks to physical processors in parallel computing system may include partitioning tasks in the parallel computing system into groups of tasks, the tasks being grouped according to their communication characteristics (e.g., pattern and frequency); mapping, by a processor, the groups of tasks to groups of physical processors, respectively; and fine tuning, by the processor, the mapping within each of the groups.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.