Method for producing compound semiconductor epitaxial substrate having PN junction
US8906158B2 · kind B2 · utility
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14Claims
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Key dates
| Filing date | Aug 23, 2005 |
| Grant date | Dec 9, 2014 |
| Priority date | — |
| Expiry date | Jun 4, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02639
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a method for producing a compound semiconductor epitaxial substrate having a pn junction by selective growth which is characterized by using a base substrate having an average residual strain of not more than 1.0×10−5.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.