Battery management systems with vertical bus circuits
US8907625B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 15, 2011 |
| Grant date | Dec 9, 2014 |
| Priority date | — |
| Expiry date | Aug 30, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02E60/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A battery management chip may include a battery management unit and a vertical bus circuit. The battery management unit can monitor a cell status of multiple cells in a battery module coupled to the battery management chip in response to an instruction from a host processor. The vertical bus circuit may transfer the instruction from the host processor to the battery management unit. The vertical bus circuit may include a first receiver, a command processor and a first transmitter. The first receiver can receive a first pair of differential input data signals. The command processor can process the first pair of differential input data signals. The first transmitter can output a first pair of differential output data signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.