Systems and methods for sampling in an input network of a delta-sigma modulator
US8907829B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | May 17, 2013 |
| Grant date | Dec 9, 2014 |
| Priority date | — |
| Expiry date | May 17, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/424
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In accordance with systems and methods of the present disclosure, an input network for a delta-sigma modulator having at least one integrator stage and a feedback digital-to-analog stage, may be configured to, during a first period of a first phase of a clock signal, drive an analog feedback signal proportional to a digital feedback signal of the feedback digital-to-analog stage onto an input plate of a sampling capacitor integral to the input network. The input network may further be configured to, during a second period of the first phase of the clock signal, sample an analog input signal onto the input plates of the sampling capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.