Patent · US Active

Method for manufacturing a semiconductor device including a stacked body comprising pluralities of first and second metallic conductive layers

US8912089B2 · kind B2 · utility

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17Claims
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Key dates

Filing dateMar 21, 2013
Grant dateDec 16, 2014
Priority date
Expiry dateMar 21, 2033

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/693

Abstract

According to one embodiment, a method for manufacturing a semiconductor device includes forming a stacked body on a substrate. The stacked body includes a plurality of first conductive layers including a metallic element as a main component and a plurality of second conductive layers including a metallic element as a main component provided respectively between the first conductive layers. The method includes making a hole to pierce the stacked body. The method includes making a slit to divide the stacked body. The method includes making a gap between the first conductive layers by removing the second conductive layers by etching via the slit or the hole. The method includes forming a memory film including a charge storage film at a side wall of the hole. The method includes forming a channel body on an inner side of the memory film inside the hole.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.