Structure and method for MOSFETS with high-K and metal gate structure
US8912610B2 · kind B2 · utility
17Cited by
1References
16Claims
0Family size
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Key dates
| Filing date | Apr 3, 2012 |
| Grant date | Dec 16, 2014 |
| Priority date | — |
| Expiry date | Aug 24, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a semiconductor structure. The semiconductor structure includes a semiconductor substrate; and a gate stack disposed on the semiconductor substrate. The gate stack includes a high k dielectric material layer, a capping layer disposed on the high k dielectric material layer, and a metal layer disposed on the capping layer. The capping layer and the high k dielectric material layer have a footing structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.