Phase change memory mask
US8913425B2 · kind B2 · utility
3Cited by
3References
23Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 12, 2013 |
| Grant date | Dec 16, 2014 |
| Priority date | — |
| Expiry date | Mar 12, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2263
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Technology for writing data to a phase change memory array is disclosed. In an example, a method may include identifying mask logic for masking cells in the phase change memory array and routing the mask logic to the cells. The method may further include routing input data to the cells. Set and reset pulses for the cells may be selectively prevented or inhibited based on the mask logic.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.