Hybrid memory architectures
US8914568B2 · kind B2 · utility
21Cited by
3References
20Claims
0Family size
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Inventors
Key dates
| Filing date | Dec 23, 2009 |
| Grant date | Dec 16, 2014 |
| Priority date | — |
| Expiry date | Apr 21, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2245
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and apparatuses for providing a hybrid memory module having both volatile and non-volatile memories to replace a DDR channel in a processing system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.