Patent · US Active

Scalability analysis for server systems

US8914781B2 · kind B2 · utility

2Cited by
10References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 24, 2008
Grant dateDec 16, 2014
Priority date
Expiry dateMar 13, 2032

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2201/885
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Described is predicting cache locality in a multicore/multithreaded processing environment including when threads share cache data in a non-uniform interleaving manner. Thread execution traces are analyzed to compute a set of per-thread parameters that can then be used to predict cache miss rates for other cache sizes. In one aspect, a model is based upon a probability that the cache reuse distance will increase because of accesses by other threads, and another probability that the reuse distance will decrease because of intercept accesses by other threads to shared data blocks. Estimates of the number of shared data blocks, possibly shared data blocks and private data blocks are used in the computations.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.