Output driving circuit capable of decreasing noise, and semiconductor memory device including the same
US8917119B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 23, 2013 |
| Grant date | Dec 23, 2014 |
| Priority date | — |
| Expiry date | Apr 13, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0185
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An output driving circuit includes a first pull-up transistor, a first pull-down transistor and a second pull-down transistor. The first pull-up transistor is configured to generate a first output signal at the output node in response to a first control signal. The first pull-down transistor is configured to generate a second output signal at the output node in response to a second control signal. The second pull-down transistor is configured to connect the output node to the first ground voltage in response to a third control signal. The memory device including the output driving circuit may be insensitive to noise and may have little data transmission error.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.