Non-volatile semiconductor memory device
US8917548B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2012 |
| Grant date | Dec 23, 2014 |
| Priority date | — |
| Expiry date | Feb 8, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile semiconductor memory device according to embodiments has a memory cell array and a reading circuit, and, in a reading sequence, the reading circuit executes a prereading operation of supplying a first reading voltage to an adjacent word line and supplying a first reading pass voltage to a selected word line, and after executing the prereading operation, executes a main reading operation of supplying a fixed second reading voltage to the selected word line and supplying a fixed second reading pass voltage to the adjacent word line while sensing a plurality of electrical physical amounts of a target memory cell with different reading conditions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.