Transceiver architecture and methods for demodulating and transmitting phase shift keying signals
US8917759B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 30, 2013 |
| Grant date | Dec 23, 2014 |
| Priority date | — |
| Expiry date | Feb 10, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/22
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A transceiver is described. The transceiver includes a first injection-locked oscillator and a second injection-locked oscillator. The transceiver also includes a first phase-locked loop coupled with the first injection-locked oscillator. The first phase-locked loop is configured to generate a first frequency reference. Further, the transceiver includes a second phase-locked loop coupled the second injection-locked oscillator. The second phase-locked loop is configured to generate a second frequency reference. The transceiver includes a mixer configured to receive the first phase-locked loop output and configured to receive said second injection-locked oscillator output. The mixer is also configured to generate a carrier frequency signal based on the first injection-locked oscillator output and the second injection-locked oscillator output. And, the transceiver includes a modulator configured to receive said carrier frequency signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.