Method and apparatus for verifying memory contents
US8918612B1 · kind B1 · utility
0Cited by
5References
24Claims
0Family size
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Inventors
Key dates
| Filing date | Feb 20, 2012 |
| Grant date | Dec 23, 2014 |
| Priority date | — |
| Expiry date | Feb 20, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L63/0823
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A system and method of verifying a content of a non-volatile reprogrammable memory communicatively coupled to a microprocessor is disclosed. The method comprises the steps of reading at least a portion of the data stored in the non-volatile reprogrammable memory via a second communication path secured by encryption, generating a computed integrity value according to at least a portion of the contents of the non-volatile reprogrammable memory, and reading an integrity value, and comparing the computed integrity value with the read integrity value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.