Interface circuit, inverter device, inverter system, and transmitting and receiving method
US8918668B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 5, 2012 |
| Grant date | Dec 23, 2014 |
| Priority date | — |
| Expiry date | Jul 3, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M7/48
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
An interface circuit includes a general-purpose CPU configured to transmit a clock to a serial encoder with which bidirectional serial communication of clock synchronization type is to be performed, the CPU being configured to transmit and receive data to and from the serial encoder; and an additional circuit configured to detect a start bit of reception data transmitted from the serial encoder. The general-purpose CPU starts counting the number of bits of the reception data in response to a detection signal from the additional circuit, the detection signal indicating the detection of the start bit. The CPU stops transmitting the clock to the serial encoder upon completion of counting a predetermined number of bits of the reception data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.