Patent · US Active

Circuit for testing integrated circuits

US8918689B2 · kind B2 · utility

4Cited by

17References

6Claims

0Family size

Assignee

STMicroelectronics International N.V. · NL

Inventors

Anirudha Kulkarni · Delhi, IN
Jasvir Singh · Novi, US

Key dates

Filing date	Aug 30, 2010
Grant date	Dec 23, 2014
Priority date	—
Expiry date	Feb 3, 2033

Classification

Technology area (CPC G)Physics
CPC primaryG11C2029/3202
WIPO fieldMeasurement
WIPO sectorInstruments

Abstract

An integrated circuit is configured to receive a test clock input and includes circuitry configured to generate test clocks from the test clock input, and test circuitry configured to use the test clocks in a test mode.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.