Hybrid phase-locked loops
US8922253B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 24, 2013 |
| Grant date | Dec 30, 2014 |
| Priority date | — |
| Expiry date | May 24, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L2207/06
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit may include an oscillator configured to generate an output signal based on an analog signal and a digital signal and a controller configured to generate an offset signal based on a comparison of a first analog control signal and a second analog control signal. The circuit may also include a divider configured to generate a feedback signal based on the output signal and the offset signal. The circuit may also include an analog control signal unit configured to generate the second analog control signal based on the feedback signal and a reference signal and a coupling unit configured to select either the first analog control signal or the second analog control signal as the analog signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.