Signal processor
US8922404B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 25, 2014 |
| Grant date | Dec 30, 2014 |
| Priority date | — |
| Expiry date | Feb 25, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/1225
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An aspect of one embodiment, there is provided a signal processor includes an AD-convertor outputting a conversion result and a conversion end flag, a second comparator configured to compare signal levels, a channel selection signal generation unit to select an input channel to input the AD-convertor, an direction identification flag generation unit to generate an direction identification flag, an edge signal generation unit to generate rising edges and lowering edges, an up-down counter to subject to be up or down on a count value in an output of each of edge signals, and an arithmetic processing unit to interlink the count value of the up-down counter and the conversion result of the AD-convertor to generate output data, wherein the arithmetic processing unit interpolates the count value of the up-down counter in the interlinking by using a correction value corresponding to a value of the direction identification flag in a period between an output of the edge signal and an output of the conversion end flag.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.