Clocked reference buffer in a successive approximation analog-to-digital converter
US8922418B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 10, 2013 |
| Grant date | Dec 30, 2014 |
| Priority date | — |
| Expiry date | May 10, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/466
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A voltage reference circuit includes a capacitor including a first terminal and including a second terminal coupled to a power supply node. The voltage reference circuit further includes an amplifier, a first transistor, and a switch. The amplifier includes a first input configured to receive a reference voltage input signal, a second input configured to receive a feedback signal, and an output. The first transistor includes a source coupled to the second input of the amplifier and to an output node, a gate coupled to the capacitor, and a drain. The first transistor is configured to provide a reference voltage at the source based on a charge provided to the gate by the capacitor. The switch includes a first terminal coupled to the output of the amplifier, and includes a second terminal coupled to the first terminal of the capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.