Method and system for detecting and asserting bus speed condition in a USB isolating device
US8924621B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 5, 2010 |
| Grant date | Dec 30, 2014 |
| Priority date | — |
| Expiry date | Oct 18, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for a Universal Serial Bus (USB) isolating device. An USB isolating device includes a downstream facing circuit and a upstream facing circuit. The downstream facing circuit is coupled to a peripheral device via a first pair of signals and is configured for detecting a speed at which the peripheral device is operating based on a first voltage configuration on the first pair of signals. The upstream facing circuit is coupled to the downstream facing circuit and a host/hub via a second pair of signals and is configured for communicating with the downstream facing circuit on the speed of the peripheral device and adaptively creating a second voltage configuration on the second pair of signals to facilitate the host/hub to adapt to the speed of the peripheral device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.