Methodology on developing metal fill as library device
US8930871B2 · kind B2 · utility
0Cited by
8References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2013 |
| Grant date | Jan 6, 2015 |
| Priority date | — |
| Expiry date | Oct 31, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P90/02
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A methodology for developing metal fill as a library device and, in particular, a method of generating a model of the effects (e.g., capacitance) of metal fills in an integrated circuit and a design structure is disclosed. The method is implemented on a computing device and includes generating a model for effects of metal fill in an integrated circuit. The metal fill model is generated prior to completion of a layout design for the integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.