Multi-security-CPU system
US8931082B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 5, 2012 |
| Grant date | Jan 6, 2015 |
| Priority date | — |
| Expiry date | Dec 22, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2221/2113
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computing system includes a first security central processing unit (SCPU) of a system-on-a-chip (SOC), the first SCPU configured to execute functions of a first security level. The computing system also includes a second SCPU of the SOC coupled with the first SCPU and coupled with a host processor, the second SCPU configured to execute functions of a second security level less secure than the first security level, and the second SCPU executing functions not executed by the first SCPU.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.