Patent · US Active

Thin film transistor memory and its fabricating method

US8932929B2 · kind B2 · utility

1Cited by
3References
8Claims
0Family size

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Key dates

Filing dateApr 24, 2012
Grant dateJan 13, 2015
Priority date
Expiry dateJun 6, 2032

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/681

Abstract

The invention relates to a thin film transistor memory and its fabricating method. This memory using the substrate as the gate electrode from bottom to up includes a charge blocking layer, a charge storage layer, a charge tunneling layer, an active region of the device and source/drain electrodes. The charge blocking layer is the ALD grown Al2O3 film. The charge storage layer is the two layer metal nanocrystals which include the first layer metal nanocrystals, the insulating layer and the second layer metal nanocrystals grown by ALD method in sequence from bottom to up. The charge tunneling layer is the symmetrical stack layer which includes the SiO2/HfO2/SiO2 or Al2O3/HfO2/Al2O3 film grown by ALD method in sequence from bottom to up. The active region of the device is the IGZO film grown by the RF sputtering method, and it is formed by the standard lithography and wet etch method. The TFT memory in this invention has the advantage with large P/E window, good data retention, high P/E speed, stable threshold voltage and simple fabricating process.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.