Method of fabricating a FinFET device
US8932957B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 13, 2013 |
| Grant date | Jan 13, 2015 |
| Priority date | — |
| Expiry date | Jul 9, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0158
Abstract
A method includes receiving a substrate having an etch stop layer deposited over the substrate and a dummy mandrel layer deposited over the etch stop layer, forming a plurality of hard mask patterns using a hard mask layer deposited over the dummy mandrel layer, wherein the hard mask patterns includes a first dimension adjusted by a predetermined value, depositing a first spacer layer over the hard mask patterns, wherein a thickness of the first spacer layer is adjusted by the predetermined value, forming a plurality of spacer fins in the dummy mandrel layer, wherein the spacer fins include a second dimension, a first space, and a second space, performing a first fin cut process to remove at least one spacer fin, adjusting the second dimension to a target dimension, performing a second fin cut process, and forming a plurality of fin structures in the substrate by etching the spacer fins.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.