Parallel synchronous bus with non-uniform spaced conductive traces for providing equalized crosstalk
US8933761B2 · kind B2 · utility
1Cited by
2References
13Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 25, 2012 |
| Grant date | Jan 13, 2015 |
| Priority date | — |
| Expiry date | Nov 25, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/09709
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods are provided a circuit interconnect. In one embodiment of the disclosure, the circuit interconnect includes a dielectric layer. A parallel synchronous bus is disposed on the dielectric layer. The parallel synchronous bus includes at least four conductive traces. The conductive traces are non-uniformly spaced from one another along a portion of the bus where the conductive traces are physically aligned in parallel so that crosstalk interference among the conductive traces is equalized across the conductive traces.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.