Tracking bit cell
US8934308B2 · kind B2 · utility
7Cited by
0References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 14, 2011 |
| Grant date | Jan 13, 2015 |
| Priority date | — |
| Expiry date | Jan 4, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/227
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory macro includes a tracking circuit and a plurality of memory cells. The tracking circuit has tracking transistors configured to receive a tracking voltage value. Each memory cell of the plurality of memory cells has memory transistors configured to receive a cell voltage value different from the tracking voltage value. The tracking circuit is configured to generate a tracking signal based on which a reading signal of a memory cell of the plurality of memory cells is generated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.