Integrated video equalizer and jitter cleaner
US8934598B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 5, 2013 |
| Grant date | Jan 13, 2015 |
| Priority date | — |
| Expiry date | May 10, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/03885
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An integrated system for adaptive equalization and jitter reduction of a video signal that includes an adaptive equalizer and a jitter cleaner located on one integrated circuit within a single package. An adaptive equalizer applies frequency specific signal modification to the received signal. A bit rate detector determines a bit rate of the video signal or the equalized signal. The jitter cleaner couples to the adaptive equalizer output and processes the equalized signal to reduce jitter in the equalized signal. A multiplexer receives the equalized signal and the jitter cleaner output and, responsive to a control signal, outputs either the equalized signal or the jitter cleaner output signal. A status monitor may optionally be included to compare the detected bit rate to a bit rate threshold, and a responsive to the comparing activate or deactivate the jitter cleaner and output either the equalized signal or jitter cleaner output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.