Apparatus and method for correcting errors in data accessed from a memory device
US8935592B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 20, 2012 |
| Grant date | Jan 13, 2015 |
| Priority date | — |
| Expiry date | Feb 9, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1048
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for correcting errors in data accessed from a memory device. A plurality of read symbols are read from a memory device. Syndrome information is then determined from the n data symbols and associated m error correction code symbols. Error correction circuitry uses the syndrome information in order to attempt to locate each read symbol containing an error and to correct the errors in each of those located read symbols. Error tracking circuitry tracks which memory regions the located read symbols containing an error originate from, and, on detecting an error threshold condition, sets at least one memory region as an erasure memory region. The correction circuitry treats each read symbol as a located read symbol containing an error, such that the read symbols to be located are not all randomly distributed and more than PMAX read symbols containing errors can be corrected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.