Method of semiconductor integrated circuit fabrication
US8937006B2 · kind B2 · utility
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1References
20Claims
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Assignee
Inventors
Key dates
| Filing date | Jul 30, 2012 |
| Grant date | Jan 20, 2015 |
| Priority date | — |
| Expiry date | Jul 11, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a semiconductor integrated circuit (IC) is disclosed. The method includes receiving a semiconductor device. The method also includes forming a step-forming-hard-mask (SFHM) on the MG stack in a predetermined area on the semiconductor substrate, performing MG recessing, depositing a MG hard mask over the semiconductor substrate and recessing the MG hard mask to fully remove the MG hard mask from the MG stack in the predetermined area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.