Electronic component and fabrication process of this electronic component
US8937385B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 6, 2013 |
| Grant date | Jan 20, 2015 |
| Priority date | — |
| Expiry date | Dec 6, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An electronic component comprising a substrate extending in a plane, having electrical connections to connect the component to a circuit, and having an upper face; an electronic chip arranged on the upper face or inside the substrate and connected to the connections via the substrate, a thick insulating layer forming a package and covering the upper face or at least part of the chip, and having an outer face parallel to the plane; a cavity inside the thick layer, the cavity having a bottom parallel to the plane and a side extending from the bottom to the outer face, the cavity having heat-absorbing material inside that is different from the material forming the thick layer. The heat-absorbing material has a specific heat capacity greater than 1 kJKg−1K−1 at a 25° C. and at 100 kPa. Either a bottom or side of the cavity is covered with a interface layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.