Method and apparatus for translating memory access address
US8937624B2 · kind B2 · utility
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18Claims
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Key dates
| Filing date | Nov 16, 2011 |
| Grant date | Jan 20, 2015 |
| Priority date | — |
| Expiry date | May 25, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/1024
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory access address translating apparatus and method may each classify pixels included in an input image into a plurality of tiles, and may generate a new memory for each of the successive tiles to enable the successive tiles, among a plurality of tiles, to be stored in different banks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.