Digital voltage boost circuit
US8937840B2 · kind B2 · utility
0Cited by
7References
23Claims
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Key dates
| Filing date | Dec 15, 2011 |
| Grant date | Jan 20, 2015 |
| Priority date | — |
| Expiry date | Aug 14, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/147
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A digital voltage boost circuit, optionally working in parallel with an analog voltage regulator, periodically injects a constant amount of current each cycle into the bit line of a high density memory array to eliminate the bias voltage reduction which would otherwise occur. This results in a much faster recovery time and reduces the semiconductor real estate required. A pulse generator in the boost circuit generates one or more current modulation signals which control corresponding current supply devices in a current source. The boost circuit drives a constant amount of current to the bias voltage node each memory cycle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.