Bias circuit
US8941437B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 25, 2014 |
| Grant date | Jan 27, 2015 |
| Priority date | — |
| Expiry date | Feb 25, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/205
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A bias circuit includes: a reference current generation circuit that has a first reference-current element disposed in a first current path and has a second reference-current element disposed in a second current path; a first current mirror circuit that has a first transistor connected in series with the first reference-current element and has a second transistor connected in series with the second reference-current element; a third reference-current element disposed in a third current path disposed between the power supply terminal and the reference-current element; a third transistor connected in series with the third reference-current element; a bypass capacitor connected between the power supply terminal and a second node connected to a control terminal of the third transistor; an activation circuit connected to the first node; and a first switch connected between the first node and the second node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.