Performance improvement for attached multi-storage devices
US8943237B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 24, 2013 |
| Grant date | Jan 27, 2015 |
| Priority date | — |
| Expiry date | Jun 24, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/385
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data storage device may comprise a controller, first and second host-addressable logical units and a communication interface. The first logical unit may comprise a first data storage, first endpoints associated with the first data storage and a first bus interface coupled between the first data storage and the first endpoints. The second logical unit may comprise a second data storage and second endpoints. The second endpoints may be associated with the second data storage and may be separate and distinct from the first endpoints. A second bus interface may be coupled between the second data storage and the second endpoints. The communication interface may be coupled to the first and second host-addressable logical units and may be configured according to communicate with the host according to a predetermined communication protocol.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.