DMI redundancy in multiple processor computer systems
US8943360B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 30, 2013 |
| Grant date | Jan 27, 2015 |
| Priority date | — |
| Expiry date | Jul 30, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2043
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In accordance with various aspects of the disclosure, a method and apparatus are disclosed that includes aspects of monitoring a first processor of a computer by a monitoring module for a first processor instability; determining if the first processor is stable based on the monitored first processor instability; routing operational priority to a second processor of the computer through a multiplexer module if the first processor is determined not to be stable, wherein a first interface of the first processor and a second interface of the second processor are in communication with the multiplexer module and wherein the first processor and the second processor are in communication by a processor interconnect; and operating the computer using the second processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.