Internal electrical contact for enclosed MEMS devices
US8945969B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 11, 2014 |
| Grant date | Feb 3, 2015 |
| Priority date | — |
| Expiry date | Aug 11, 2034 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB81C2203/031
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A method of fabricating electrical connections in an integrated MEMS device is disclosed. The method comprises forming a MEMS wafer. Forming a MEMS wafer includes forming one cavity in a first semiconductor layer, bonding the first semiconductor layer to a second semiconductor layer with a dielectric layer disposed between the first semiconductor layer and the second semiconductor layer, and etching at least one via through the second semiconductor layer and the dielectric layer and depositing a conductive material on the second semiconductor layer and filling the at least one via. Forming a MEMS wafer also includes patterning and etching the conductive material to form one standoff and depositing a germanium layer on the conductive material, patterning and etching the germanium layer, and patterning and etching the second semiconductor layer to define one MEMS structure. The method also includes bonding the MEMS wafer to a base substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.