Methods and apparatus for image processing at pixel rate
US8947446B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 13, 2013 |
| Grant date | Feb 3, 2015 |
| Priority date | — |
| Expiry date | May 13, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2200/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present invention provide for improved timing control in 2-D image processing to maintain a constant rate of fetches and pixel outputs even when the processing operations transition to a new line or frame of pixels. A one-to-one relationship between incoming pixel rate and outgoing pixel rate is maintained without additional clock cycles or memory bandwidth as an improved timing control according to the present invention takes advantage of idle memory bandwidth by pre-fetching a new column of pixel data in a first pixel block of a next line or frame while a new column of an edge pixel block on a current line is duplicated or zeroed out. As the edge pixel block(s) on the current line are processed, the data in the first pixel block of the next line or frame become ready for computation without extra clock cycles or extra memory bandwidth.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.