Protection systems for integrated circuits and methods of forming the same
US8947841B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 13, 2012 |
| Grant date | Feb 3, 2015 |
| Priority date | — |
| Expiry date | Nov 30, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Harsh electrical environments integrated circuit protection for system-level robustness and methods of forming the same are provided. In one embodiment, a protection system includes dual-polarity high blocking voltage primary and secondary protection devices each electrically connected to a pad. The primary protection device has a current handling capability greater than a current handling capability of the secondary protection devices, and the secondary protection device has a turn-on speed that is faster than a turn-on speed of the primary protection device so as to decrease pad voltage overshoot when a fast transient electrical event occurs on the pad. Additionally, the holding voltage of the primary protection device is less than a holding voltage of the secondary protection device such that once the primary protection device has been activated the primary protection device clamps the pad voltage so as to minimize a flow of high current through the secondary protection device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.