Dynamic index selection in a hardware cache
US8949530B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 2, 2011 |
| Grant date | Feb 3, 2015 |
| Priority date | — |
| Expiry date | Sep 19, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/601
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods are disclosed for improving the performance of cache memory in a computer system by dynamically selecting an index for caching main memory while an application is running. A disclosed example of a memory system includes a cache including a data array, a primary tag array, and at least one secondary tag array. A currently selected index is used to index data bits to the data array and tag bits to the primary tag array. The performance of at least one candidate index is evaluated by indexing tag bits to the secondary tag array, without caching any data using the candidate index while the candidate index is under evaluation. If the candidate index has a better hit rate than the currently selected index, the memory system switches to using the candidate index to cache data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.