Arithmetic node including general digital signal processing functions for an adaptive computing machine
US8949576B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 13, 2003 |
| Grant date | Feb 3, 2015 |
| Priority date | — |
| Expiry date | May 15, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8007
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus for processing operations in an adaptive computing environment is provided. The adaptive computing environment including at least one processing node. A node includes a memory configured to receive and store data. The data is received from a programmable interconnection network and stored. The node also includes an execution unit configured to perform a signal processing operation. The operation is performed using data retrieved from the memory and an output result is generated. The output result may be used for further computations or sent directly to the programmable interconnection network for transfer to another processing node in the adaptive computing environment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.