Semiconductor devices including an electrically percolating source layer and methods of fabricating the same
US8952361B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 4, 2011 |
| Grant date | Feb 10, 2015 |
| Priority date | — |
| Expiry date | Dec 29, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K85/221
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
Various embodiments are provided for semiconductor devices including an electrically percolating source layer and methods of fabricating the same. In one embodiment, a semiconductor device includes a gate layer, a dielectric layer, a memory layer, a source layer, a semiconducting channel layer, and a drain layer. The source layer is electrically percolating and perforated. The semiconducting channel layer is in contact with the source layer and the memory layer. The source layer and the semiconducting channel layer form a gate voltage tunable charge injection barrier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.