Storage subsystem
US8954666B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 15, 2009 |
| Grant date | Feb 10, 2015 |
| Priority date | — |
| Expiry date | Jan 23, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/466
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided is a storage subsystem capable of speeding up the input/output processing for a cache memory. Microprocessor Packages manage information related to a VDEV ownership for controlling virtual devices and a cache segment ownership for controlling cache segments in units of Microprocessor Packages, and one Microprocessor among multiple Microprocessors belonging to the determined Microprocessor Package to perform input/output processing for the virtual devices searches cache control information stored in the Package Memory without searching the cache control information in the shared memory, and if data exists in the cache memory, accesses the cache memory, and if it does not, accesses the virtual devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.